The subject matter of the present application relates to microelectronic packages, circuit panels, and microelectronic assemblies incorporating one or more microelectronic package and a circuit panel.
Semiconductor chips are commonly provided as individual, prepackaged units. A standard chip has a flat, rectangular body with a large front face having contacts connected to the internal circuitry of the chip. Each individual chip typically is contained in a package having external terminals connected to the contacts of the chip. In turn, the terminals, i.e., the external connection points of the package, are configured to electrically connect to a circuit panel, such as a printed circuit board. In many conventional designs, the chip package occupies an area of the circuit panel considerably larger than the area of the chip itself. As used in this disclosure with reference to a flat chip having a front face, the “area of the chip” should be understood as referring to the area of the front face.
Size is a significant consideration in any physical arrangement of chips. The demand for more compact physical arrangements of chips has become even more intense with the rapid progress of portable electronic devices. Merely by way of example, devices commonly referred to as “smart phones” integrate the functions of a cellular telephone with powerful data processors, memory, and ancillary devices such as global positioning system receivers, electronic cameras, and local area network connections along with high-resolution displays and associated image processing chips. Such devices can provide capabilities such as full internet connectivity, entertainment including full-resolution video, navigation, electronic banking and more, all in a pocket-size device.
Complex portable devices require packing numerous chips into a small space. Moreover, some of the chips have many input and output connections, commonly referred to as “I/Os.” These I/Os must be interconnected with the I/Os of other chips. The components that form the interconnections should not greatly increase the size of the assembly. Similar needs arise in other applications as, for example, in data servers such as those used in internet search engines where increased performance and size reduction are needed.
Semiconductor chips containing memory storage arrays, particularly dynamic random access memory chips (DRAMs) and flash memory chips, are commonly packaged in single- or multiple-chip packages and assemblies. Each package has many electrical connections for carrying signals, power, and ground between terminals and the chips therein. The electrical connections can include different kinds of conductors such as horizontal conductors, e.g., traces, beam leads, etc., that extend in a horizontal direction relative to a contact-bearing surface of a chip, vertical conductors such as vias, which extend in a vertical direction relative to the surface of the chip, and wire bonds that extend in both horizontal and vertical directions relative to the surface of the chip.
Conventional microelectronic packages can incorporate a microelectronic element that is configured to predominantly provide memory storage array function, i.e., a microelectronic element that embodies a greater number of active devices to provide memory storage array function than any other function. The microelectronic element may be or may include a DRAM chip, or a stacked electrically interconnected assembly of such semiconductor chips.
For example, in one conventional microelectronic package 1 seen in FIG. 1A, columns of terminals 2 can be disposed adjacent edges of a package substrate 3. FIG. 1A further shows two semiconductor chips 4 within the package having element contacts 5 on a face 6 thereof that are electrically interconnected with the terminals 2 of the package 1 through flip-chip connections, for example.
FIG. 1B shows the electrical connections within the conventional microelectronic package 1. In the microelectronic package 1, several of the terminals 2 that are configured to receive command and address signals are electrically connected to the element contacts 5 of both of the semiconductor chips 4. For example, each of the terminals 2 configured to receive address signals A0 through A14 are electrically connected with a corresponding element contact 5 of both of the semiconductor chips 4. Also in the microelectronic package 1, several of the terminals 2 that are configured to receive data signals are electrically connected to the element contacts 5 of both of the semiconductor chips 4. For example, each of the terminals 2 configured to receive data signals DQ0 through DQ3 are electrically connected with a corresponding element contact 5 of both of the semiconductor chips 4.
In light of the foregoing, certain improvements in the design of circuit panels or other microelectronic components can be made in order to improve the functional flexibility or electrical performance thereof, particularly in circuit panels or other microelectronic components to which packages can be mounted and electrically interconnected with one another.